Future Parallella boards

[toterpinguin]

Hi everyone!
I am really excited about the Parallella platform because of its openness and the future processors promised!
I've got a few questions I hope someone of the team can answer.

1) Will future versions of the Epiphany processor (with more than 64 cores) also be offered as Parallella-like standalone boards or only as PCI-e accelerator cards. I really hope you also offer standalone boards because they could offer more flexibility like better density in racks etc.
2) Why does the epiphany not have a fast interface to external RAM like GPUs do? Does this have to do with energy efficiency ?
As far as I could tell, the max speed of Epiphany/RAM transfer is 1.4 GB/s while even low end GPUs offer around 100 GB/s of RAM bandwidth. This can be a deal-breaker for some applications like realtime graphics (ok it's not designed for that, but still)
3) (interests me most) What would the estimated cost of a 1024-core Parallella be? (I know it's a bit early to ask, but could you give a rough estimate) I would hope for less than $600, because then It could not only be better than GPUs in energy efficiency but also be really competitive in terms of price/performance and could not only appeal to mobile/embedded uses but also to datacenters/rendering farms etc.

I hope you can give me some insight!

[aolofsson]

[LamsonNguyen]

I think it is up to us, the Parallella community, to make a compelling case for Epiphany. We need to write parallel code, create killer apps, develop great products for businesses as well as end users (Parallella cell phones/laptops/tablets anyone?), and do whatever we can to get people to the point where they think, "I'll take Epiphany over Intel/Nvidia/everybody else because __________." So, what will you do?

[toterpinguin]

Thanks for the info!
Intel's Xeon Phi is not really competitive against GPUs or ever CPUs IMO (gives typical speedup of maybe 3x against a mainstream Ivy Bridge system and costs $2500 while consuming 300 watts).
Nvidia's Tesla cards are also very expensive for the performance they provide and the gamer cards have their double precision performance artifically reduced to 1/6 of the professional ones. Also, the GTX 600 "Kepler" cards ofter are slower in compute benchmarks compared to the previous generation! Similarly, they lose out big time against Radeon cards in OpenCL benchmarks ( look for LuxMark scores at bottom of the page) probably because of bad drivers.
Neither AMD nor Nvidia (and I think the same applies to Xeon Phi) have any support for compute using open-source drivers and the proprietary ones are architecture-limited, buggy and unoptimized with no option to change that.
This is where the Parallella shines (and being able to carry the power of a standard desktop PC in your pocket in a device that consumes only a few watts and can run fanless is of course amazing). And not being dependent on the PC platform with its slow and proprietary BIOS, Microsoft-controlled Secure Boot etc. also is a good thing.
So I really hope the Parallella platform will be a big success and I will definately buy the 64-core version when it becomes available.

One more question: How fast can the Epiphany chip switch from one task to another (one probably has to download on-chip memory content, registers etc. and upload new code and data)? This could be important in a really parallel-optimized system where for instance a graphics software and a web browser's rendering engine want to access the coprocessor at the same time.

[bgracia]

I see the cost of R&D. I think that when I hit the LOTTERY, I will invest so as to get ahold of 1K Core chips before everyone else!!!

Brian

[glasspelican]

[Dade]

[timpart]

If you are going to produce a 1K core chip I think you will have to find some way of increasing I/O, with wider or extra or faster channels. On current specs a chip gets a max of 8G bytes per second into it. A 1 K core chip @ 800 MHz does 800 G cycles per second (many of which could do 2 operations at once). So programs that need less than 100 cycles per byte will have to wait for data to come in and cores will be stalled. I think such a chip is best suited to things like weather prediction where initial data are loaded then a lot of iterations are performed on them.

Tim

[Dade]