I'm interested in this too. I didn't know about UIO but it seems like a good way to do it. For now I'm using a server running as root to access the chip and the user interface connects as client to it.
I've found this article exactly about accessing a memory-mapped FPGA device in the ZYNQ on a ZedBoard:
https://fpgacpu.wordpress.com/2013/05/2 ... -part-two/There it says that the ADI kernel has the UIO drivers included in the source tree but not in the default configuration.
The Parallella kernel is forked from that one and sure enough, it has the drivers:
https://github.com/parallella/parallell ... rivers/uioThey are not activated in the default configurations, but it seems that you could get them by compiling your own kernel.
The configuration files are
parallella_defconfig and
parallella_lite_defconfig, and both of them have "
# CONFIG_UIO is not set":
https://github.com/parallella/parallell ... nfig#L2584https://github.com/parallella/parallell ... nfig#L2584That's all I know so far.