Some observations and questions about my pre-ordered board
Posted: Thu Jul 25, 2013 11:47 amI was mildly happy to have a october-delivery pre-order put in yesterday, for a 7010/connectors/accessory-set Adaptive kit!
I saw transport cost to Holland was $20, and I compared accessory parts cost with other sources, so after being fed up with so many parts and variations and price points, I took the offered accessory set, because I can't vastly beat the price easily, and it's preferable to have a main-stream setup, that compares with many others (order number indicates a little under 2000 units sold ?
). The same reasoning holds for going with the 7010 anyhow, even though I'm quite into the FPGA part of the project (the 7020 Zinq has ~2.5 times more resources for an extra $80).
I was wondering if people have already "played" with the Epiphany<-->Zinq FPGA design as supplied in Open Source by Adapteva: how much FPGA space does it take ? How is the throughput and what's the memory block usage percentage ? Also, I was wondering if there can (if needed) be a "light" version for the connection between the 16-core chip and and Zinq processor, so that the bandwidth is a reasonable fraction (I've understood most of the bandwidth is often not yet usable), so that the FPGA can be used easier for other designs, while maintaining (or I'd imagine even driving, I mean apart from the DMA to the ARM-9) connectivity, and making sure the interfaces and supplies start up as intended.
Also, is it a big computer burden to run the FPGA design on a PC? I have worked with a 32 bit processor (eco32, Giesse) design (and other projects) on a fast I7 notebook with Xilinx' free webpack ISE13.x (on Fedora 17/64bit), which worked fine, but maybe the Zinq+Adapteva interface takes a little more processor power?
Also, did some one install the requires Webpack 14.x on Linux recently ? I have access to a very fast I7 extreme machine I built, ready for trying out a nice SSD install of the big free packages of Xilinx, but I'd like to now if there are known issues with this. Otherwise I can put it on Windows 8, but I prefer Linux (Fedora 18/64bit).
Recalling a mr. Beau... has spoken about making breakout boards, I wondered if that's still ok or maybe even an active project already? I have a spartan 3e board with working interfaces for the 32MB memory, 8MB flash and display and such and a nice big connector to a breadboard connected to it, and some spartan 3 boards with display, switches and 1MB flash memory laying around and would think it interesting to play with that, connected to the nice Adaptiva credit card. Apart from the connectors, is there some space for a few 1/10" pins somewhere on the board? And those SPI interfaces, how can they be connected ? I got some great BurrBrown volume control chips I'd like to prototype., but can't deduce the connectors supplied from the datasheet, whereas I really need a few fast FPGA pins for high frequency AD/DA convertors.
Any experience with USB hubs on the peripheral USB port ? I mean I'd nice to have a mouse/keyboard and a disk and maybe an audio interface! Or is that asking too much of the poor 667 MHz dual core ARM ?
Theo V.
I saw transport cost to Holland was $20, and I compared accessory parts cost with other sources, so after being fed up with so many parts and variations and price points, I took the offered accessory set, because I can't vastly beat the price easily, and it's preferable to have a main-stream setup, that compares with many others (order number indicates a little under 2000 units sold ?
). The same reasoning holds for going with the 7010 anyhow, even though I'm quite into the FPGA part of the project (the 7020 Zinq has ~2.5 times more resources for an extra $80).I was wondering if people have already "played" with the Epiphany<-->Zinq FPGA design as supplied in Open Source by Adapteva: how much FPGA space does it take ? How is the throughput and what's the memory block usage percentage ? Also, I was wondering if there can (if needed) be a "light" version for the connection between the 16-core chip and and Zinq processor, so that the bandwidth is a reasonable fraction (I've understood most of the bandwidth is often not yet usable), so that the FPGA can be used easier for other designs, while maintaining (or I'd imagine even driving, I mean apart from the DMA to the ARM-9) connectivity, and making sure the interfaces and supplies start up as intended.
Also, is it a big computer burden to run the FPGA design on a PC? I have worked with a 32 bit processor (eco32, Giesse) design (and other projects) on a fast I7 notebook with Xilinx' free webpack ISE13.x (on Fedora 17/64bit), which worked fine, but maybe the Zinq+Adapteva interface takes a little more processor power?
Also, did some one install the requires Webpack 14.x on Linux recently ? I have access to a very fast I7 extreme machine I built, ready for trying out a nice SSD install of the big free packages of Xilinx, but I'd like to now if there are known issues with this. Otherwise I can put it on Windows 8, but I prefer Linux (Fedora 18/64bit).
Recalling a mr. Beau... has spoken about making breakout boards, I wondered if that's still ok or maybe even an active project already? I have a spartan 3e board with working interfaces for the 32MB memory, 8MB flash and display and such and a nice big connector to a breadboard connected to it, and some spartan 3 boards with display, switches and 1MB flash memory laying around and would think it interesting to play with that, connected to the nice Adaptiva credit card. Apart from the connectors, is there some space for a few 1/10" pins somewhere on the board? And those SPI interfaces, how can they be connected ? I got some great BurrBrown volume control chips I'd like to prototype., but can't deduce the connectors supplied from the datasheet, whereas I really need a few fast FPGA pins for high frequency AD/DA convertors.
Any experience with USB hubs on the peripheral USB port ? I mean I'd nice to have a mouse/keyboard and a disk and maybe an audio interface! Or is that asking too much of the poor 667 MHz dual core ARM ?
Theo V.