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Radical new vertically integrated 3D chip design combines computing and data storage

http://www.kurzweilai.net/radical-new-v ... ta-storage



Four vertical layers in new 3D nanosystem chip. Top (fourth layer): sensors and more than one million carbon-nanotube field-effect transistor (CNFET) logic inverters; third layer, on-chip non-volatile RRAM (1 Mbit memory); second layer, CNFET logic with classification accelerator (to identify sensor inputs); first (bottom) layer, silicon FET logic. (credit: Max M. Shulaker et al./Nature)

@8l,

Are you involved or familiar with this work?

My understanding is that this can't yet be mass produced. The article isn't specific about performance or capabilities of this type of IC compared to modern silicon-based ICs.

no, just another dreamer.

what we have talk about is not to be realized these days,

but future.