Parallella Community

The existing documentations give a great overview of the assembly language but do not specify the binary instruction encoding. Will this be made available? It could enable, for instance, an LLVM port.

We would publish the opcode tables immediately if there is serious interest in starting work on a LLVM (or other compiler) back end for the Epiphany. Any takers?

I would be vary interested In working on a Port of LLVM. I have kept myself entertained for the last couple months reading about it and looking into automatic parallelization passes.

I couldn't commit to an LLVM port per se, but if I get time I would like to play with some similar JIT-type stuff across multiple processors, with (implicit) clock-level synchronization, using the excellent cycle-level comms model already presented in the docs (with its curious 1/2 cycles!) Just for fun, you understand

And I want this stuff partly just because the nerd in me needs to see it, because it gives him power over the hardware (even if he never uses that power).

Thanks for putting it so eloquently and for making me laugh this morning. I will put the tables into the main arch ref doc this morning.

Epiphany Architecture Reference Manual has been updated with the opcode table: (pg130)

http://www.adapteva.com/support/docs/e3 ... ce-manual/

Enjoy!
Andreas

Does an assembler and emulator exist for the parallella core? It would be nice to try creating code prior to getting hardware. And might be nice for automated testing of created code.
dave

Yes, but only for a single core, so no multi-core stuff just yet. That will have to wait until you get your hands on a board.