JTAG and SRST

[afy]

Hi,

It seems it's not possible to reset the Zynq SoC via JTAG? The Zynq's PS_SRST_B pin is connected directly to 1.8V according to the Parallella schematics, and the Porcupine schematics have JTAG pin 14 (which is SRST on the Digilent JTAG-HS3 adapter) as not connected.

If that diagnosis is correct, might it be possible to route that pin in future Porcupine and/or Parallella board revisions?

Regards,
Andreas

[aolofsson]

Andreas,
If this is indeed a must have, then we will certainly implement it on the next version. Are you sure this is actually needed to operate correctly?
In the past, we did a "soft reset" once connected with the JTAG cable.
Cheers,
Andreas

[greytery]

Andreas,

Sadly, from experience, I think it is a MUST HAVE to provide access to the JTAG pins other than via the PEC Power/Porcupine connectors.
Best as pins (like the UART). May not be enough space for the full JTAG header as implemented on the Porcupine - but at least let the pins be accessible via pads.

Bricked Microservers - or boards without the Samtec sockets - have no realistic way back.

Cheers,