Quite surely it have no relations with the ecc memory but this brought me to a question (still a dream for me but maybe someone already thought about it): is there any way to implement an ecc structure on the parallella board (in my case 7020 + GPIO)?
I suppose that the ram chip must be native ecc (that is not at the moment), maybe there's another way without changing the hardware?
My opinion (with no fundamentals) is that sacrificing some in core memory on the epiphany and writing the correct fpga this may be achieved ... true ?
I never had experience on ecc system but i would like to try

Thanks