Xilinx Design Constraint

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations

Xilinx Design Constraint

Postby parallella-project » Wed May 16, 2018 4:16 pm

As I've found various version of design constraint in github I am curious which one is exactly the right XDC for Parallella 7020?
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Re: Xilinx Design Constraint

Postby olajep » Thu May 17, 2018 9:17 am

_start = 266470723;
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