Creating an FPGA accelerator in 15 minutes
Posted: Thu Jan 21, 2016 8:50 pm
I finally got around to creating an FPGA "sandbox" example for parallella.
Completely scripted. As long as you have Vivado installed, just edit the verilog code and build with one command. No dependency on Xilinx proprietary IP generator. No need to open the GUI.
https://www.parallella.org/2016/01/21/c ... 5-minutes/
Completely scripted. As long as you have Vivado installed, just edit the verilog code and build with one command. No dependency on Xilinx proprietary IP generator. No need to open the GUI.
https://www.parallella.org/2016/01/21/c ... 5-minutes/