Vivado / ISE project for Parallella

[jimmystone]

Hi, ALL

Are there any document talk about how to build up a Vivado/ISE project for Parallella.
Are there any Vivado/ISE project ready for download.

I have no idea how to load the bitstream file to Parallella. Can anyone help?

BTW, I just find some source code in github, parallella-hw, But not the whole Vivado/ISE project.

[9600]

Please see this post on and the follow-up post which covers .

However, note that these were written with the ZedBoard-based prototypes in mind, and IIRC there have been changes to how images are loaded with the final form factor boards — I think that with these the bitstream is now stored in a seperate file and so it's easier to replace.

Cheers,

Andrew

[tnt]

It would definitely help to have an updated guide for the rev0 prototypes ... I'll need to build a custom bitstream for it soon (well, as soon as the simulation works and I'd hate to loose hours on it ...