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Parallella Community • View topic - FPGA download method

FPGA download method

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

FPGA download method

Postby Gilvin » Thu Jul 25, 2013 8:47 am

Hi folks, I'm a beginner with FPGA and I've studied this page:

http://www.adapteva.com/white-papers/bu ... -platform/

I'm not sure how to download the FPGA bit-stream into the chip, do I need to buy an additional Xilinx FPGA downloader? Or I could just put my bit-stream file into the SD card and let ARM do the work for me?

Sorry if the question is too stupid :mrgreen:
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Re: FPGA download method

Postby 9600 » Thu Jul 25, 2013 9:23 am

Andrew Back
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Re: FPGA download method

Postby aolofsson » Thu Jul 25, 2013 1:42 pm

The method that Andrew mentioned was the initial one used for the Zedboard based prototype. The actual Parallella board has the FPGA bitstream as a separate file in the BOOT partition of the SD card. You can update the bitstream by just placing a new file in that partition. The file should be called "parallella.bit.bin."

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Re: FPGA download method

Postby Gilvin » Thu Jul 25, 2013 4:36 pm

Thanks all, got the idea :D
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Re: FPGA download method

Postby wuher » Fri Jul 26, 2013 8:50 am

Now that I think about this - does Parallella have a JTAG header somewhere?
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Re: FPGA download method

Postby aolofsson » Fri Jul 26, 2013 2:16 pm

The JTAG pins go through the PEC_POWER connector. There will be a breakout board to provide easy access to these pins. There will likely not be a jtag header, so you will need to use the "patch wire cable" to hook up to the 0.1in header on the breakout board.
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Re: FPGA download method

Postby Sundance » Sat Jul 27, 2013 4:32 pm

Hi,

1. The Xilinx JTAG interface is described here - http://www.xilinx.com/products/boards-a ... B-II-G.htm - and is a USD225.00 investment - and NO, I do not work for Xilinx ;) Alternatives are available or a second-hand from eBay. Useful for download/debug of FPGA, but the bit-streams can be integrated in the boot-file, so not sure that really required for Parallella Users.

No user for Epiphany programming/debug. :geek:


2. Multiple ideas are floating around for a "Break-Out" board to hold the Parallella. One idea is here - viewtopic.php?f=11&t=406&start=10 - and the JTAG are available on the 0.1" Headers and could be daisy-chained. The Xilinx unit ships with 0.1" cables.

This - P0002 - is still a "Work-in-Progress", and the JTAG lines could be routed to a separate 14-way header, as found on the Xilinx Cable, if that is a chosen route by the Community.
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