by EggBaconAndSpam » Tue Jul 16, 2013 6:42 pm
"The TRAP instruction causes the processor to halt and wait for external inputs."
- is "external interrupt" used to describe any interrupt? If not, please define the applicable subset...
Other than that, I am quite certain that the epiphany architecture does not guarantee any timings on TRAPs, they are to be interpreted by the host device (the almight ARM in the case of Parallella, potentially the FPGA interferes to some degree).
Anyway, the interpretation of TRAPs is out of spec for the chip, you should either treat them as breakpoints, or expose some sort of API to handle them.
Even though the Mighy Book of Reference mentions TRAP 7 in context with file handling syscalls, a look at the current epiphany-libs, implies that they are yet to be implemented. Treating TRAPs as breakpoints (or runtime exceptions, if you so desire) should therefore be compatible to the current setup.
As for the BKPT: similar situation...
All in all, mimicking a certain debugger's behaviour (in this case GDB) does not seem necessary at emulation level (real code does not depend on the way breakpoints are interpreted, and TRAPs aren't implemented yet, anyway), feel free to expose breakpoints and TRAPs through a custom API...
Or just crash, you know... (Though not mentioning the TRAP parameter does seem unnecessarily cruel to me)