IP Protection for Algorithms
Posted: Wed Aug 24, 2016 8:27 amHi,
I came across parallela while researching FPGA, while don't have much background in FPGA, have been researching to implement an algorithm with parallelism characteristics in FPGA, in a way to protect IP, in additions to performance. What my thought about IP protection is that I can create an encrypted bitstream and provision the FPGA, which make it difficult for others to gain access and protect algorithm from various attacks.
What I want to understand is if I implement the algorithm is C/C++, which is much easier than HDL for us, targeting Epiphany what options do I have ti protect the IP. Could I store the C Program as bitstream in FPGA and have the Epiphany load the program from the FPGA, would there be a concern of side channel attacks.
I am new to both FPGA and Parallella but conceptually how I can use Parallellla at the same time get protecting from my IP.
Thanks,
I came across parallela while researching FPGA, while don't have much background in FPGA, have been researching to implement an algorithm with parallelism characteristics in FPGA, in a way to protect IP, in additions to performance. What my thought about IP protection is that I can create an encrypted bitstream and provision the FPGA, which make it difficult for others to gain access and protect algorithm from various attacks.
What I want to understand is if I implement the algorithm is C/C++, which is much easier than HDL for us, targeting Epiphany what options do I have ti protect the IP. Could I store the C Program as bitstream in FPGA and have the Epiphany load the program from the FPGA, would there be a concern of side channel attacks.
I am new to both FPGA and Parallella but conceptually how I can use Parallellla at the same time get protecting from my IP.
Thanks,