Parallella Community

From data sheet: eLinks operate at divided system clock (max 800MHz). However Parallella says 1.6GB links.

is it 1.6GByte per DIRECTION or 1.6GByte total in both directions?

If 1.6GB per data direction it means the eLink is clock is system clock divided by ONE (that is not divided) ad data is transmitted on both edges, that is DDR

If 1.6GB combined then its either DDR at with 400MHz eLink clock or single rate with 800MHz clock.

What is proper link speed and clock?

The link clock is half of the core clock.
The links run DDR.
The 1.6GB/s per link is the total bandwidth (in and out) :
2 (in/out) x 0.4GHz clock x 2bits/cycle(ddr)