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Parallella Community • View topic - Parallella 2.0 Design Specifications

Parallella 2.0 Design Specifications

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

Re: Parallella 2.0 Design Specifications

Postby tnt » Thu Jul 10, 2014 7:11 am

As another nice addition to v2.0:

Try to leave mechanically clear path to all the mounting holes. I was trying to fix a large heatsink over all the surface (with cutouts obviously), and the UART connector is right in the way of one of the mounting hole. If it was only rotated 90 deg then you'd have some way to mechanically come from the center of the board to that mounting hole.
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Re: Parallella 2.0 Design Specifications

Postby aolofsson » Thu Jul 10, 2014 11:40 am

tnt, Definitely agree. What is your view on moving/rotate the UART position? I don't think this is an issue, but would like to hear other opinions.
My assumption is that nothing should move unless it has to, but there are different levels of importance.

Any comments on the following moves for 2.0?

THINGS THAT WILL NEVER EVER CHANGE!:
-size and position of mounting holes
-board dimension
-position/size of samtec PEC connectors

THINGS THAT MAY HAVE TO MOVE: (need comments wrt to "pain inflicted")
-usb, hdmi, uSD connectors (slight shift, but will stay on the same side)
-power, eth connectors (shift on same side)
-all/any headers and test points (power, uart)

THINGS THAT ARE VERY LIKELY TO MOVE:
-ICs
-caps

Andreas
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Re: Parallella 2.0 Design Specifications

Postby greytery » Thu Jul 10, 2014 6:03 pm

What about the Reset Button?

You are (probably) moving the 2-3 caps that stand proud next to the Zync/Epiphany so that (probably) you can get larger heatsinks.
If the heatsinks are bigger, then they may cover the reset button - or at least the reset button would limit the size of the heatsink.

Suggest this button moves to either the USB or Power end. Next to the rotated UART might be neat.

Cheers,
tery
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Re: Parallella 2.0 Design Specifications

Postby AlbertoGP » Fri Jul 11, 2014 7:42 am

Moving the reset button out of the way of the heatsink is Change #6 in the first post:
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Re: Parallella 2.0 Design Specifications

Postby greytery » Fri Jul 11, 2014 8:55 am

I knew it was a good idea!! :oops:
tery
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Re: Parallella 2.0 Design Specifications

Postby timpart » Thu Jul 24, 2014 6:50 am

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Re: Parallella 2.0 Design Specifications

Postby 9600 » Thu Jul 24, 2014 8:50 am

I did wonder about a diode across the 5V input for reverse-polarity protection, but then those capable of replacing the onboard fuse are probably the ones least likely to get the power supply polarity wrong...

Cheers,

Andrew
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Re: Parallella 2.0 Design Specifications

Postby ajtravis » Thu Jul 24, 2014 9:50 am

Minke Informatics Limited, Registered in Scotland - Company No. SC419028
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Re: Parallella 2.0 Design Specifications

Postby timpart » Thu Jul 24, 2014 12:42 pm

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Re: Parallella 2.0 Design Specifications

Postby fml » Tue Jul 29, 2014 4:08 pm

Once several boards are lined up in the north-to-south direction the routing protocol only permits an Epiphania node to access the DRAM on the same board. This might be different if the boards were lined up west-to-east. If so, this is my proposal for the redesign.

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