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Parallella Community • View topic - Bare metal application with FPGA co-processor

Bare metal application with FPGA co-processor

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

Bare metal application with FPGA co-processor

Postby miguel_rodrigues » Thu Feb 18, 2016 3:41 pm

Hello everybody,

First of all, let me say that I am pretty interested in acquiring a Parallella board even if it does not fit my purposes just because it is so cool :D That said, I have been designing using the Zybo board from Digilent, which features a Zynq 7010. Despite the possibility to run an OS in it, I have been using bare metal applications running on the ARMs while the FPGA is being used to speed-up time critical application parts (image processing mostly). Also, I program the board via USB from the Xilinx SDK instead of booting from the SD Card.

Is it possible to program the Parallella board from the Xilinx SDK or does it need to boot from the SD Card?

Is it possible to use the Epiphany chip even without having an OS installed?

What is the best way to migrate my designs from Zybo to the Parallella board without breaking the possibility to use the Epiphany chip?

From what I've been reading around, the Parallella is mostly used with Linux and I don't discard that possibility but I need to be able to: (1) be able to use the Programmable Logic with AXI DMA access to/from the DDR, (2) be able to use the Epiphany chip.

Best regards :)
Miguel
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Re: Bare metal application with FPGA co-processor

Postby sebraa » Thu Feb 18, 2016 8:06 pm

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Re: Bare metal application with FPGA co-processor

Postby miguel_rodrigues » Fri Feb 19, 2016 8:13 am

Thanks for this information :)

Taking this into account I think my best option is to put Linux into the Parallella and start from it. Then, I will generate the bitstream to be uploaded into the FPGA either from within the Parallella (with Xilinx Vivado and SDK installed) or from another computer and send it to the Parallella.

However, I was not able to find any Vivado project with the eLink interface. All I found was tutorials describing how to use the FPGA part of the Zynq without making use of the eLink interface, which of course do not allow to use the Epiphany.

If someone could point me to where in the github this exists (if it exists), I would be very grateful :D
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Re: Bare metal application with FPGA co-processor

Postby sebraa » Fri Feb 19, 2016 2:04 pm

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Re: Bare metal application with FPGA co-processor

Postby aolofsson » Fri Feb 19, 2016 2:15 pm

Here is the entry point for building Vivado project. You should be able to follow the paths. Everything is scripted.
https://github.com/parallella/oh/blob/m ... s/build.sh
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Re: Bare metal application with FPGA co-processor

Postby miguel_rodrigues » Fri Feb 19, 2016 9:32 pm

Hey guys,

Many thanks for your help :) I do think I can go on from here :D

On Monday I will be on this again (my home computer is not god enough to get Vivado running) and I will share my results. In the meanwhile, I will read a lot :D
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Re: Bare metal application with FPGA co-processor

Postby miguel_rodrigues » Thu Feb 25, 2016 5:01 pm

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Re: Bare metal application with FPGA co-processor

Postby aolofsson » Thu Feb 25, 2016 11:22 pm

What version of vivado are you using?
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Re: Bare metal application with FPGA co-processor

Postby miguel_rodrigues » Fri Feb 26, 2016 9:25 am

I am using Vivado 2015.4.

If it matters, one project I was able to open and use was this one -> https://github.com/Kirill888/parallella-fpga-dummy-io
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Re: Bare metal application with FPGA co-processor

Postby eliaskousk » Fri May 20, 2016 6:28 pm

Last edited by eliaskousk on Fri May 20, 2016 7:15 pm, edited 2 times in total.
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