Parallella Community

Note that the Epiphany SDK has nothing to do with Vivado and FPGA programming.

At power-on U-boot is loaded from flash, and this in turn loads the FPGA bitstream and Linux kernel. If you just wanted to load the FPGA, I'm guessing that this would be possible, but that may need to rebuild/configure U-boot so that it doesn't look for a kernel — I'm not certain on this and someone else may be able to comment.

The FPGA can also be programmed via the JTAG connections which are presented via the PEC_POWER (Samtec) connector on the underside of the board.

Regards,

Andrew

Thanks Andrew,

Yes you are right, I'm configuring through JTAG, Xilinx SDK downloading bitstream but not fully running application, it's not giving output through gtkterm. I just wanted to test my design through Xilinx SDK, how I was testing with Zedboard by generating bitstream and with help of SDK downloading it and testing with simple applications.

Right, understand.

Since this forum is for the Epiphany SDK could you post any further discussion concerning FPGA programming to the (ISE and Vivado etc. are not considered to be part of this SDK).

Cheers,

Andrew

I've recently acquired a Parallella desktop computer for a research project, but I'm having a hard time figuring out the proper toolchain and workflow. It seems that the various references, repositories, and guides are completely out of sync with one another.

Is there a current guide available that covers compiling and launching an Epiphany program?

Install the current image to an SD card, then use e-gcc to compile your program.
The API is described in the SDK documentation.

You don't need to compile your own kernel, SDK, FPGA bitstream etc. from any repositories unless you want to.

Adam Taylor's Parallella Chronicles blog posts really helped me out a lot:

https://www.parallella.org/2014/11/25/p ... art-one-2/

Excellent, thanks for the link to the Parallella Chronicles. It's exactly what I was looking for.