Example DMA design (Vivado 2015.4)

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations

Re: Example DMA design (Vivado 2015.4)

Postby kirill » Tue May 17, 2016 10:18 am

Hi Miguel, I'm glad you found this useful.

I think your conclusion is correct, u-boot it placing device tree out of reach for kernel with mem=256M parameter. While it is possible to replace u-boot on parallella it is not easy nor safe. Generally if you don't have JTAG access (requires special expansion board + JTAG programmer) you shouldn't be trying to replace u-boot/fsbl. Parallella doesn't allow for loading fsbl from sd-card, only from internal memory or over JTAG. So if you make a mistake in this process the only way to un-brick is via JTAG.

Having said that, I do not think you need to replace u-boot to achieve what you want. If you power up your parallella board without sd-card plugged in you will enter u-boot prompt (I assume you have UART working), from that you can load your kernel any way you desire.

Something like
Code: Select all
#insert sd card after power up
mmc rescan
fatls mmc 0
env print
#Look at qspiboot command, and use that as template for making your own
env set myboot "echo my special boot; echo put rest of commands here"
#then just run it
run myboot


Once you are happy with your special boot command you can save it to nand with "env save", for your special boot to be used by default when parallella starts, you will need to change variable modeboot to be "run myboot" instead of "run qspiboot"
kirill
 
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Re: Example DMA design (Vivado 2015.4)

Postby theover » Sun Oct 02, 2016 1:33 am

HI Kirill and others,

Just a quick heads up, I've tried the DMA setup in the first post with VIvado 2016.2 on Fedora, with kernel 3.14.12-parallella-xilinx-... and it works:

Code: Select all
$ sudo ./test_dma.py
SRC: [120 147  72  36] ...
DST: [255 255 255 255] ...
DMA Transaction Completed
SUCCESS: Data copied as expected
SRC: [120 147  72  36] ...
DST: [120 147  72  36] ...

Time Stats
================================================================================
Memory    : 1.04858 Mb(in) + 1.04858 Mb(out) = 2.09715 Mb(total)
Took      : 4.18305 ms
Per item  : 0.0159571 us
Items/s   : 62668089.4
Throughput: 250.672 Mb/s(in) + 250.672 Mb/s(out) = 501.345 Mb/s


I am very happy with this, and certainly hope to try my hands on a C example and trying the tantalizing idea of some HLS exampels with DMA. 250 MByte per second is serious bandwidth. I used the previous version on git because I didn't update my Parallella Ubuntu tot he latest version, and I think I didn't put in boot arguments and have left the device tree with the AXI-lite multiply example in as well, but that doesn't seem to matter. I didn't know the ".bit" file could be used on the device as well instead of the modification that some little script did in the Parallella examples I've used which required a SDK download (or copy of some files of it like I did).

Thank you Kirill!

Theo V.
theover
 
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Joined: Mon Dec 17, 2012 4:50 pm

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