[phpBB Debug] PHP Warning: in file [ROOT]/includes/bbcode.php on line 112: preg_replace(): The /e modifier is no longer supported, use preg_replace_callback instead
[phpBB Debug] PHP Warning: in file [ROOT]/includes/bbcode.php on line 112: preg_replace(): The /e modifier is no longer supported, use preg_replace_callback instead
[phpBB Debug] PHP Warning: in file [ROOT]/includes/bbcode.php on line 112: preg_replace(): The /e modifier is no longer supported, use preg_replace_callback instead
[phpBB Debug] PHP Warning: in file [ROOT]/includes/functions.php on line 4688: Cannot modify header information - headers already sent by (output started at [ROOT]/includes/functions.php:3823)
[phpBB Debug] PHP Warning: in file [ROOT]/includes/functions.php on line 4690: Cannot modify header information - headers already sent by (output started at [ROOT]/includes/functions.php:3823)
[phpBB Debug] PHP Warning: in file [ROOT]/includes/functions.php on line 4691: Cannot modify header information - headers already sent by (output started at [ROOT]/includes/functions.php:3823)
[phpBB Debug] PHP Warning: in file [ROOT]/includes/functions.php on line 4692: Cannot modify header information - headers already sent by (output started at [ROOT]/includes/functions.php:3823)
Parallella Community • View topic - Minimal Vivado Project 2015.3

Minimal Vivado Project 2015.3

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations

Minimal Vivado Project 2015.3

Postby kirill » Sat Nov 14, 2015 1:12 pm

kirill
 
Posts: 38
Joined: Mon Sep 28, 2015 7:24 am

Re: Minimal Vivado Project 2015.3

Postby kirill » Sun Nov 15, 2015 7:34 am

I have now updated the repository with a simple design that includes custom IP. AXI based multiplier circuit.

Repository linked below includes design, sample app and instructions on how to run it:

https://github.com/Kirill888/parallella ... ter/sample

Design looks something like this:
Image
kirill
 
Posts: 38
Joined: Mon Sep 28, 2015 7:24 am

Re: Minimal Vivado Project 2015.3

Postby theover » Sun Nov 15, 2015 2:00 pm

Interesting, I've something else planned but maybe tomorrow I'll give it a try.

I started reading over the Readme file, did you do a rudimentary benchmark on your example ? Also I was wondering what the "dummy" IO block does it connect the GPIO or is it "empty" ?

Theo V.
theover
 
Posts: 181
Joined: Mon Dec 17, 2012 4:50 pm

Re: Minimal Vivado Project 2015.3

Postby kirill » Sun Nov 15, 2015 8:41 pm

Thanks for feedback Theo. The "dummy io" part refers to RX/TX/CCLK_P/CCLK_N and DSP_RESET_N signals, GPIO and I2C are connected in exactly the same way as in the Adapteva's design, I use the same modules internally. It's really more like "dummy eLink". Naming things is hard.

Regarding benchmark -- I haven't measured timing. I know it will be slower than a CPU implementation of the multiply, by ALOT. This is not a "this is how you accelerate an algorithm using FPGA" tutorial. I chose multiply because that's what tutorial on fpgdadeveloper.com was using, and because I couldn't do a simple "flash a LED" demo on parallella.

Having said that, I am interested in "FPGA as a co-processor use-case", but for that we need to use DMA based design with interrupts for completion notification. This is the next thing I want to learn how to do.
kirill
 
Posts: 38
Joined: Mon Sep 28, 2015 7:24 am

Re: Minimal Vivado Project 2015.3

Postby theover » Mon Nov 16, 2015 10:47 pm

I added the SDK to my Vivado 2015.3, downloaded your git project, followed the steps, got a bit file in a couple of minutes, loaded it in, changed the device tree, compiled the examples and everything worked!

So that makes me happy camper, now I'll try out some other examples and IO. I changed the program a little to loop a multiply for a million times, which gave results as I thought and the loop was going at a few million times per second, using a user account program (I changed the device permissions).

T.
theover
 
Posts: 181
Joined: Mon Dec 17, 2012 4:50 pm

Re: Minimal Vivado Project 2015.3

Postby Armmaster » Wed Dec 02, 2015 4:22 pm

Hi all,

I'm trying to go through kirill's instruction. Everything is ok except after generating new device tree generic-uio appears in device tree, but there is no any /dev/uio* device.
As I understand I should have some support in kernel or install a kind of uio driver for making it work.
Looking in kernel options I see:

linaro-nano:~> zcat /proc/config.gz | grep UIO
# CONFIG_UIO is not set

I'm using ubuntu Desktop With Disply image from parallella site:
ubuntu-14.04-hdmi-z7010-20140611.img.gz

So, what I'm doing wrong? Should I use some another image (headless?) or recompile kernel with some additional options?
Armmaster
 
Posts: 2
Joined: Wed Nov 25, 2015 5:59 pm

Re: Minimal Vivado Project 2015.3

Postby kirill » Thu Dec 03, 2015 10:22 am

kirill
 
Posts: 38
Joined: Mon Sep 28, 2015 7:24 am

Re: Minimal Vivado Project 2015.3

Postby Armmaster » Thu Dec 03, 2015 1:36 pm

Thanks for reply.

I've solved an issue installing headless image version and everything works fine!
Before that I tried to recompile kernel enabling UIO options, but I wasn't lucky - system just hangs after that.
Armmaster
 
Posts: 2
Joined: Wed Nov 25, 2015 5:59 pm

Re: Minimal Vivado Project 2015.3

Postby qrios » Wed Dec 16, 2015 3:08 pm

Hi Kirill888,

Thanks a lot! This was exactly what I was looking for. Espacially that you use VHDL is great for me. Everything works fine using a desktop parallella with 7020.

I have one stupid question: How is the /dev/uio0 generated? Is this done by the modifications of the devicetree and then something magic happens?
qrios
 
Posts: 4
Joined: Mon Dec 17, 2012 1:37 pm

Re: Minimal Vivado Project 2015.3

Postby kirill » Thu Dec 17, 2015 10:05 am

kirill
 
Posts: 38
Joined: Mon Sep 28, 2015 7:24 am

Next

Return to FPGA Design

Who is online

Users browsing this forum: No registered users and 11 guests

cron