risc-v and such

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations

risc-v and such

Postby jlambrecht » Sun Jun 05, 2016 7:42 pm

Since i've got to know parallella i've been in doubt of buying one, with my skill level it's just an arm board with dead-weight fpga and epiphany. So, slowly, i started picking up a bit here and there on fpga and along the way i got to understand better what a killer bundle this parallella board actually is. By chance i also picked up on rex/neo and risc-v / lowrisc.

By now, i've grown bedazzled enough to have some questions.

[ risc-v] I've learned it also has soft processor cores and it's probably going to be the next core should any new adapteva/parallella product launch ( this year ? )
[ fpga ] can risc-v soft processors be uploaded to the existing Zync 7010 / 7020 fpga ? has it been tried, is it doable ?
[ epiphany ] this is a surplus question, is it evolving ? Will it become virtualized and become an FPGA-only board with the eMesh architecture as a NOC using the risc-v soft processor ? ( oh yeah, i'm both curious and speculative here )

I'm kind of convinced i can do something with a parallella board by now ( if not only for opencl based ids using the zync-fpga ? ) but it is still hard to find use for the epiphany from my point of view. Are there any uses for the parallella board if you're not a comp.science engineer or a hardware addict ?
jlambrecht
 
Posts: 41
Joined: Wed Nov 13, 2013 7:57 pm

Re: risc-v and such

Postby 6thimage » Sun Jun 05, 2016 11:13 pm

RISC V is an instruction set (like x86 and the various ARM versions), anyone can turn it into a processor and its licensing is really nice - it's free. If you make your own ARM processor - like Apple, Qualcomm and Samsung do - you have to pay a ridiculously large amount to do so (seriously, you just don't ask). With RISC V being free, there is a lot of people using it in their own processors and as it is really expensive to get them made into silicon, most of these are soft-cores (i.e. run on FPGAs).

Whilst I have no idea when the RISC V instruction set will be used by adapteva, it is unlikely to be very soon - its possible in the next 5 to 10 years, but the next year is likely to be too soon. There is a lot that can be done on the current architecture, so jumping to something new, whilst attracting new interest (everyone loves RISC V at the moment), would likely irritate and annoy current users.

jlambrecht wrote:[ fpga ] can risc-v soft processors be uploaded to the existing Zync 7010 / 7020 fpga ? has it been tried, is it doable ?

Yes, the FPGA in the zynq can be configured to whatever you like - although you will still need to have an elink if you want to talk to the epiphany processor. The zynq on the parallella has 17,600 LUTs (assuming it's the microserver model), which should be enough, but you might struggle with some of the larger processors. If you want to play with a small RISC V have a look at https://github.com/cliffordwolf/picorv32 - it is a very small (~1500 LUTs) processor, which is fairly low performance (0.34 DMIPS/MHz) but can run at quite fast speeds (300 - 400 MHz, which is quite fast for FPGAs) - but you should be able to fit around 10 of these into the zynq's FPGA fabric.

jlambrecht wrote:[ epiphany ] this is a surplus question, is it evolving ? Will it become virtualized and become an FPGA-only board with the eMesh architecture as a NOC using the risc-v soft processor ? ( oh yeah, i'm both curious and speculative here )

No.

FPGAs are good for designing on and for things that need to be changed frequently or need the ability to be changed in the future. But they are slower than silicon and large FPGAs are ludicrously expensive (have a look at the largest virtex FPGAs on digikey). Whilst they are used in many products, they are often used because getting a silicon design made would be too expensive (this is often the case with oscilloscopes). To put several processors on an FPGA with a mesh like network and get a good performance from them, you'll be looking at virtex level FPGAs at a few thousand pounds / dollars - for research it is fine, but for a commercial product it is just too much. If you use a smaller or lower level FPGA, the performance will just not be worth it. So something like the epiphany will always be done in silicon.

jlambrecht wrote:I'm kind of convinced i can do something with a parallella board by now ( if not only for opencl based ids using the zync-fpga ? ) but it is still hard to find use for the epiphany from my point of view. Are there any uses for the parallella board if you're not a comp.science engineer or a hardware addict ?


The parallella excels in the same arena as GPUs, but has the flexibility that each core can be doing something different / doesn't have the branching issues of GPUs. General applications of processing on GPUs tends to be either graphics or game related, with the main applications being in research. I think the same kind of thing applies to the epiphany, it has a lot of potential, but it probably isn't something that can be used by everyone, partly because it is a distinct product. GPUs were used for physics processing in games because they were already there. There was a physics accelerator card that was available before GPU processing took off, but that didn't do so well and I think that was due to its niche appeal and low numbers (why would you add a feature to a big product / game, if less than a percent of people are ever going to be able use it?).

I do wonder if the parallella would be more used (that is, more people and applications using it) if a PCIe version was available, as it would make the development easier in some respects (wouldn't have to ssh to a headless server). It would also allow programs on the host to offload some processing to the epiphany in an easier way, in a similar way that processing on GPUs works. Whereas currently, you have to write separate programs to run on the zynq/epiphany, so if you want to process something, there is an extra step to getting it done (i.e. you have to transfer everything to the parallella before it can start).
6thimage
 
Posts: 7
Joined: Sun Apr 17, 2016 1:00 pm

Re: risc-v and such

Postby DonQuichotte » Mon Jun 06, 2016 11:13 am

Totally agree with you, 6thimage ; a PCIe version would be a tremendous evolution :D
I even have a better dream if possible: a pilchard-like card. Pilchard was an FPGA you were inserting in a memory slot, that was space odyssey - I mean, in 2001.
You'd then get the better of both worlds: my 32 Gb DDR4 RAM would be as near as it could from my beloved Epiphany de la Parallella :)

I agree ; any code with (very low RAM needs and) lots of branchs should behave very well with Epiphany (penalty is only 0 or 3 cycles), much better than with GPU or heavy pipelined x86 CPU.
I've tried both ; GPU was a failure (same experiment from another guy) ; whereas Paralle2 - a simple backtracker for Eternity II-like puzzles - works great for Epiphany.
Epiphany does the same job as two thirds of a high end CPU single core (core i7 Haswell 5820k, turbo mode 3.6 GHz) - with low power 4.7 W instead of 72 W O_O
You should have few data and much computation ; I currently code a simple OCR (Optical Character Recognition), maybe it could fit too.
User avatar
DonQuichotte
 
Posts: 46
Joined: Fri Apr 29, 2016 9:58 pm

Re: risc-v and such

Postby sebraa » Mon Jun 06, 2016 1:33 pm

I don't like the concept of PCIe cards anymore, since computers supporting them have been disappearing so much since the shift to mobile. A USB-3 version could be a nice "instant accelerator" solution for any computer, though. But while USB 3 (barely) matches the eLink bandwidth, an update to the Epiphany there makes it unsuitable again.
sebraa
 
Posts: 495
Joined: Mon Jul 21, 2014 7:54 pm

Re: risc-v and such

Postby dobkeratops » Mon Jun 06, 2016 7:49 pm

The epiphany ISA isn't so far from RISC-V (which is probably why RISC-V is such a natural switch for further evolution of this product line). In terms of educational and development value, concepts will go across quite nicely. (the one difference I can remember offhand (?) is that epiphany has a unified register file whilst RISC-V has more traditional separate float/int registers, but the total number is the same.. 64 vs 32+32. There are a few more quirks but for the main part you'd be coding in C and focussing more on leveraging the special memory architecture.
dobkeratops
 
Posts: 189
Joined: Fri Jun 05, 2015 6:42 pm
Location: uk

Re: risc-v and such

Postby eliaskousk » Thu Aug 04, 2016 4:47 pm

Hi all,

I have ported RISC-V rocket-chip generated cores (RV64IMA @ 50 MHz and RV64IMAFD @ 25 MHz) on Parallella for my GSoC project.

A bitstream with either of them can boot RISC-V Linux (with RISC-V poky root image) on your Parallella.

You also won't lose any original Parallella functionality since I included everything the original bitstreams provide (E-Link, I2C, GPIO).

The default core without FPU (RV64IMA) boots on all Parallella versions, while the bigger one which contains the FPU (RV64IMAFD) can only fit on the Kickstarter and Embedded versions that have the bigger Zynq device.

You can find the parallella-riscv repo here: https://github.com/eliaskousk/parallella-riscv

I will soon update with more content the blog where I describe my project: http://eliaskousk.teamdac.com

It would be great if you can test things out (master branch) and if possible report me of any problems you encountered.

Cheers,
Elias
eliaskousk
 
Posts: 3
Joined: Mon Apr 25, 2016 10:17 am

Re: risc-v and such

Postby jar » Fri Aug 05, 2016 2:02 pm

Wow, this looks cool!

I want to try this out next week.
User avatar
jar
 
Posts: 295
Joined: Mon Dec 17, 2012 3:27 am

Re: risc-v and such

Postby promach » Thu May 25, 2017 3:12 pm

eliaskousk wrote:Hi all,

I have ported RISC-V rocket-chip generated cores (RV64IMA @ 50 MHz and RV64IMAFD @ 25 MHz) on Parallella for my GSoC project.

A bitstream with either of them can boot RISC-V Linux (with RISC-V poky root image) on your Parallella.

You also won't lose any original Parallella functionality since I included everything the original bitstreams provide (E-Link, I2C, GPIO).

The default core without FPU (RV64IMA) boots on all Parallella versions, while the bigger one which contains the FPU (RV64IMAFD) can only fit on the Kickstarter and Embedded versions that have the bigger Zynq device.

You can find the parallella-riscv repo here: https://github.com/eliaskousk/parallella-riscv

I will soon update with more content the blog where I describe my project: http://eliaskousk.teamdac.com

It would be great if you can test things out (master branch) and if possible report me of any problems you encountered.

Cheers,
Elias


Hi,
I came across the project at https://github.com/eliaskousk/parallella-riscv
I have bitstream build error that points to line 63 of path_to_scripts/Makefrag file

https://github.com/eliaskousk/parallella-riscv/blob/5f1d37e7696dec78f11b531b2314b509823b2da3/scripts/Makefrag#L63

cp: cannot stat './parallella_riscv/system.runs/impl_1/system_wrapper.bit': No such file or directory

I search for the file system_wrapper.bit within parallella-riscv, but there is none.

I have attached the log file for the command: ./scripts/build.fpga.bitstream.sh >> bitstream_script.log

bitstream_script.log
bitstream_script log file
(52.72 KiB) Downloaded 427 times

Please advise.
promach
 
Posts: 6
Joined: Mon Dec 12, 2016 9:03 am


Return to FPGA Design

Who is online

Users browsing this forum: No registered users and 2 guests