eLink FPGA project

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations

Re: eLink FPGA project

Postby peteasa » Fri Jan 29, 2016 4:11 pm

Hi Miguel,
Look at the announcement http://www.adapteva.com/announcements/a ... erface/.... I have oh fpga running ok with my own epiphany char driver but have not yet done any speed tests to verify the above announcement. I was working on getting the mailbox working so that the cpu can be interrupted by the epiphany core, rather than speed testing.
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Re: eLink FPGA project

Postby MiguelTasende » Fri Jan 29, 2016 8:12 pm

Hi Pete,

Thanks a lot for your answer.

I had seen that blog post, but I was wondering "what that really meant": If it was an old post, and those changes were already in use (with less performance than expected), if it was something very new and still not thoroughly tested, or if it was already tested.

It is great to know that there is a good chance that it will work better than the present e-link FPGA. I will be trying it very soon, then.

P.S.: Oh, the CPU interrupted by the Epiphany would be great! (is one of the first things I thought it was missing when I thought the Parallella platform could be used as "Epiphany with ARM services and interfaces" instead of "ARM with Epiphany co-processor"...)
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Re: eLink FPGA project

Postby peteasa » Sat Jan 30, 2016 10:32 pm

Trying today may be more difficult. I have a working 7020 (and a 7010 image not yet tested but very likely to work). At the moment it is all built with yocto from the parallella-oh branch at https://github.com/peteasa/parallella/t ... allella-oh. I am about to move the oh fpga onto the default branch (elink-redesign) in my repository once I have tested both images. But the yocto environment is not necessarily the easiest thing to get working... unless you know how... so I have created a wiki to help (https://github.com/peteasa/parallella/w ... ng-started). It is possible to build a full gui based system (sato image), but at the moment I keep the default image simple but sufficient to test the hdmi, and epiphany interfaces that both use the fpga. I am using my own char driver in the kernel that uses the interrupts and have developed a simple way to interrupt user side arm based application code to read the mailbox etc. If you are getting started with yocto please leave feedback at viewtopic.php?f=49&t=3180&start=10 so that I can work out how to improve the environment.
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