Results of simple BRAM to user space throughput testing.

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations

Results of simple BRAM to user space throughput testing.

Postby boeserbaer » Tue Mar 24, 2015 4:36 pm

Hi All,

I thought I would share some early results, using the Parallella with a simple AXI BRAM controller.

44MBytes/s per thread for 4k page size transfers. I Only tested with 2 threads, but was able to get an aggregate of 88MBytes/s using mmap and memcpy to user space. Right now I have a single 8k BRAM attached.

I hope this helps someone else.

Best Regards, Mike
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Re: Results of simple BRAM to user space throughput testing.

Postby aolofsson » Wed Apr 01, 2015 3:18 am

Mike,
A good data point. Thanks for sharing! The two vs one thread bw difference is something I hadn't measured. Makes sense. We also found that the memcpy in the new rootfs/kernel seems faster than the old one...
Andreas
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