Disassembly of Epiphany code

Disassembly of Epiphany code

Postby xilman » Fri Nov 28, 2014 9:54 am

This may be a dumb question: what's the simplest way of disassembling Epiphany code?

The background: I'm interested in getting the highest possible performance on integer code and, in particular, multiprecision arithmetic. The Epiphany is (openly I must say) optimised for traditional single precision floating point DSP work, so doesn't have very good support for what I want. For instance:
Code: Select all
par1:~/Work/epiphany-examples/cpu/basic_math> ./run.sh
[sudo] password for linaro:

The clock cycle count for addition is 5.

The clock cycle count for subtraction is 5.

The clock cycle count for multiplication is 6.

The clock cycle count for division is 47.
and I'd like to see how division is implemented. Some rummaging found lib_a-div.o hiding inside /opt/adapteva/esdk/tools/e-gnu/epiphany-elf/lib/libc.a. Extracting it was trivial but objdump(1) doesn't know how to disassemble it.
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Re: Disassembly of Epiphany code

Postby Melkhior » Fri Nov 28, 2014 10:14 am

xilman wrote:Extracting it was trivial but objdump(1) doesn't know how to disassemble it.


Code: Select all
e-objdump -D /opt/adapteva/esdk/tools/e-gnu/epiphany-elf/lib/libc.a


works for me.
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Re: Disassembly of Epiphany code

Postby xilman » Fri Nov 28, 2014 9:11 pm

Melkhior wrote:
xilman wrote:Extracting it was trivial but objdump(1) doesn't know how to disassemble it.


Code: Select all
e-objdump -D /opt/adapteva/esdk/tools/e-gnu/epiphany-elf/lib/libc.a


works for me.
Ah, I knew it was a dumb question. The e_ prefix is what I needed.

Thanks!

Paul
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Re: Disassembly of Epiphany code

Postby notzed » Sat Nov 29, 2014 6:46 am

For integer division the ultimate source is in gcc, since 'div()' just uses / and %, but you probably already know/discovered this.

https://github.com/adapteva/epiphany-gc ... g/epiphany

divsi3 is the one of interest. Looks like there's an assembly version.

If you know it'll be within range/can get the maths right floating point reciprocal may be an option (uses newton-raphson).
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Re: Disassembly of Epiphany code

Postby xilman » Sat Nov 29, 2014 12:34 pm

notzed wrote:For integer division the ultimate source is in gcc, since 'div()' just uses / and %, but you probably already know/discovered this.

https://github.com/adapteva/epiphany-gc ... g/epiphany

divsi3 is the one of interest. Looks like there's an assembly version.

If you know it'll be within range/can get the maths right floating point reciprocal may be an option (uses newton-raphson).
Took a look, thanks.

I think I may be able to do better than that with some thought. Some 30 years ago I microcoded 32-bit div, mul and mod (and IEEE fp and dp for that matter) on a machine with only add/sub and logic operators supported in hardware. On that architecture non-restoring division was markedly faster than the restoring version as implemented in the present Epiphany code.

Paul
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Re: Disassembly of Epiphany code

Postby rowan194 » Wed Feb 25, 2015 5:11 am

This does look like it could be improved. I've had a quick look, most of it seems to be about changing the config register (FPU exceptions?) then restoring it, plus a lot of shuffling around (maybe to catch edge cases?). No wonder it takes so many cycles. Wouldn't it be much better to do this inline, with the compiler knowing the state of the config register, so it doesn't have to do two read/modify/write operations?

I couldn't seem to find this source in any of the *div*.S files at https://github.com/adapteva/epiphany-gc ... g/epiphany ... am I missing something?

Code: Select all
lib_a-div.o:     file format elf32-epiphany

Disassembly of section .text:

00000000 <_div>:
   0:   ffcb 4ff2       mov r23,0xfffe
   4:   d55c 2700       str lr,[sp],-0x2
   8:   fe2b 5ff2       movt r23,0xfff1
   c:   a0ef 4002       mov r21,r0
  10:   c4ef 4002       mov r22,r1
  14:   6112            movfs r3,config
  16:   0392            gid
  18:   0112            movfs r0,config
  1a:   03df 010a       and r0,r0,r23
  1e:   0102            movts config,r0
  20:   0192            gie
  22:   000b 6002       mov r24,0x0
  26:   000b 7002       movt r24,0x0
  2a:   14ef 0802       mov r0,r21
  2e:   015f 0c02       jalr r24
  32:   800b 4002       mov r20,0x0
  36:   800b 5002       movt r20,0x0
  3a:   00ef 6002       mov r24,r0
  3e:   38ef 0802       mov r1,r22
  42:   14ef 0802       mov r0,r21
  46:   115f 0802       jalr r20
  4a:   80ef 4002       mov r20,r0
  4e:   143b 0800       sub r0,r21,0
  52:   1680            blt 7e <_div+0x7e>
  54:   103b 0800       sub r0,r20,0
  58:   1b80            blt 8e <_div+0x8e>
  5a:   0392            gid
  5c:   0112            movfs r0,config
  5e:   018a            eor r0,r0,r3
  60:   03df 010a       and r0,r0,r23
  64:   018a            eor r0,r0,r3
  66:   0102            movts config,r0
  68:   0192            gie
  6a:   00ef 0c02       mov r0,r24
  6e:   30ef 0802       mov r1,r20
  72:   d54c 2400       ldr lr,[sp,+0x2]
  76:   b41b 2401       add sp,sp,8
  7a:   194f 0402       rts
  7e:   103b 0800       sub r0,r20,0
  82:   ec90            blte 5a <_div+0x5a>
  84:   039b 6cff       add r24,r24,-1
  88:   931f 490a       add r20,r20,r22
  8c:   e7e0            b 5a <_div+0x5a>
  8e:   009b 6c00       add r24,r24,1
  92:   933f 490a       sub r20,r20,r22
  96:   e2e0    b 5a <_div+0x5a>
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