Parallella Community

I don't quite understand the descriptions of these two instructions. I can't see anything to specify the position of the notional fixed point (i.e. how many of the bits in the 32-bit result of the FIX instruction represent the fractional part.)

Am I missing something obvious?

I had the same reaction!

But there isn't one and they only cast to integer (or round) or float with no scaling You have to apply the scaling with a separate pre or post multiply by 2^(+-n).

There are a lot of bits unused in the (32-bit) instruction encoding so maybe it was a planned thing that never made it, was never planned due to the 16-bit set not having the bits, or just a space tradeoff for the fpu silicon vs 1 extra instruction (if the scaling constants are already loaded).

Thanks for the explanation. That does make sense.