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Parallella Community • View topic - The Hardware Loop Feature

The Hardware Loop Feature

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

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Re: The Hardware Loop Feature

Postby ysapir » Wed May 15, 2013 3:22 pm

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Re: The Hardware Loop Feature

Postby shodruk » Wed May 15, 2013 4:21 pm

How about this?

gcc -c -O3 -funroll-loops small_core.c
gcc -c -Os big_main.c
gcc big_main.o small_core.o
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Re: The Hardware Loop Feature

Postby ysapir » Wed May 15, 2013 9:10 pm

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Re: The Hardware Loop Feature

Postby Folknology » Thu May 16, 2013 10:48 am

The hardware loop features do look useful for really tight hardware based loops (real time patternmatching/protocol work) and with 'interrupt-vectoring out' I could imagine some interesting zip port pattern type scenarios taking full advantage.

regards
Al
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