Syncronization between host and epiphany cores

[adricadar]

[Anthony]

[adricadar]

Thank you Anthony for your input.

I succeed to wait in the end for a process to finish something if it's only about this synchronization message.

If I try to send other messages tha infinite loop still persist. I even try to write at different addreses and 0x24 (for sync flag) and 0x1000 (for message). The error still persist. There is something (blog post/tutorial/...) that help me to undersand why I have this problems with the memory?

[cmcconnell]

[adricadar]

[cmcconnell]

I think you should take a step back and read the documentation more carefully. Look at the descriptions of the e_read and e_write functions, and look at the way memory is organised.

You can either implement your 16 flags in external (DRAM) memory, where each flag will have a separate address (e.g., be one of 16 elements in a contiguous array), OR you can implement the flags in the Epiphany cores' own memory, in which case the address of each individual flag will be the same on each core, and from the ARM side you access the one you want using the row and col parameters to e_read.

You first of all need to decide which of these two things you are trying to do.

Either way, if you want the host code to wait for all 16 cores to finish, then you must somewhere have code which is looping until all 16 flags have changed state. [That's if the cores are running in parallel. I just noticed that the structure of the main program in your first post implies that only one core will run at a time. I don't know if that is as you intended it; I presume not.]

[DonQuichotte]

Hi adricadar

That was my first goal too:
running 16 independant device cores, and they tell the host when they are done, through SDRAM.
Each eCore has its own 4-byte SDRAM area.
I found e_read() / e_write() not trivial at all, even after re-reading the docs, but with e_core_id() this is absolutely all what I need and use, device-side.

It's probably not the academic way of coding but... it works for me (Parallella E16G301, 16-core, Zynq 7020 headless image with SDK 2015.1)
Stored in "paralle2" in the Parallella-examples repository ; hope it helps.