A 4-way cluster backplane

[9600]

[dezldog]

Yes, please! If you are interested, I would like to use the backplanes as a means to make clustering more tractable, lass cable-y.

I think that would be a great Kickstarter!

clark

[bgracia]

I am interested as well.

[henryson]

Breakout would be wonderful all by itself, a 4-way one even more so. It should work whether people have 1 board, or 20 - the backplane should be able to link to another of itself, to extend the range. Naturally, there are limits to some of the communication methods, but a few busses could run the length of it. Also, it should link the fpgas in JTAG, for easy programming. Physically, it should be easy to attach backplanes together in a stack. Perhaps a mounting place for a cooling fan?

[timpart]

Sounds like a great idea. Here are my initial thoughts.

Make the board somewhat more than twice the size of a parallella and plug in the smaller boards in a 2 by 2 arrangement flat onto the larger board.

Allow it to have less than four boards plugged in. (The positions would probably have to be occupied in a certain order; I'm not proposing total flexibility.)

Allow enough space to attach ethernet cables to all boards if desired.

Allow the option of even more expansion by including the following
[*]Some means of setting the base address of the board. The lower two bits of the row could be hard wired to 00 01 10 and 11 on the respective boards.
[*] Arrange the North South connections in a U shape and put the ends of the U onto an optional connector to plug into an even larger rack mountable backplane. Make it some common standard if possible to allow off the shelf backplanes perhaps? Edit: have just realized that a big off the shelf backplane with sockets would probably have them wired as a bus and that wouldn't work. they need to go to adjacent sockets on opposite pins only.

The unfortunate differences between the 16 and 64 core chips mean that it is not possible to have a simple direct wired layout that caters for both types. (By both I mean all 16 core of all 64 core. Mixing types is even harder as different voltage standards are used.) Perhaps two PCB versions are needed? Cheaper than an FPGA.

Regards,

Tim

[9600]

[henryson]

Adding an fpga for routing would be fun, if only to have more fabric available, but a microcontroller might also do a fine job of routing signals for far less money. If we need to handle DSP signals (we should) then having the micro drive a physical mux would make the most sense, since that would prevent the signal bottleneck being the routing chip.

The propeller by parallax.com comes to mind as a fantastic and cheap option ($8 or so, plus whatever for the mux arrangement).
an 8-core chip, it allows you to run 8 different I/O programs simultaneously, in case the switching instructions need to come from the boards as well as to them.

A fancier option would be a cypress PSoC 5, although that option brings way more than you need, and costs more, the added features might be worthwhile in terms of what you can do with the routing. It has fpga and mixed signal capabilities inside. Their website seems to be having a fit at the moment, so good luck finding the data sheet.


I'd like to toss in some ESD protection to my wish list. Those boards aren't cheap, having another layer of zener protection and voltage stabilization (which wouldn't be hard to make an optional solder on to keep costs down) would likely be widely welcome.

[timpart]

[dezldog]

I love all these ideas - but what be the best way to define scope to make it possible to actually happen?

To illustrate, (but not necessarily advocate)

v0.1 - basic single card functionality for x16
basic fully populated back plane functionality (addresses, i/o management for the base 4 cards, etc.? [or what ever made sense])
ESD and i/o protection, signal level/conditioning
daughter/mezzanine card standard that unifies the Parallella cards' i/o

v0.2 - multi-backplane integration (or maybe x16 and x64 compatibility?)

v0.3 - ???

I'm probably proving my ignorance, but I would really like to see it happen. Making something simple, robust, and useable as a base to build on seems a good strategy.

Thanks!

[ticso]

At most you can interconnect 16x 16 core parallella or 4x 64 core.
That is because only one mesh direction is available of the 64x64 epiphany address matrix.
There really is no sense doing 64 core with backplane interconnection when you already have 4 parallella on a sile carrier board.

Another limitation is the card size.
Using standard euro cards with 100mm height you can place one parallella if you want the ethernet port facing to the outside or 4 parallella on double size eurocard 233mm height as each parallela has 53.34mm.
However a parallella is only 86.36mm deep leaving a lot of space to the backplane with standard 160mm deep cards, which is bad for signal quality.
I personally intend something similar, but using the backplane only for power and place additional application specific components on the carrier board, so that it is no generic design anymore and since I might need front space I can only do 3 parallella boards on a single double height euro card.