Parallella Community

Hello,

I couldn't find the specific pin the FPGA expansion headers map to. e.g. what pin on the FPGA is GPIO1. Is this published somewhere? The example project also didn't seem to specify this in the UCF file.

Regards,

-Colin

I imagine this will be published when the schematics are released.
The current board could be considered a prototype, as such, there is no guarantee that the current pin-out is final

Yup understood... well hopefully they push something soonish, as would be nice to spin something that would work with the current prototype, even if it doesn't work with future versions!

We'll publish an updated Parallella spec next week and will include the FPGA pin mapping.
Andreas