Ideas for daughter cards?

Sub forum for Parallella daughter cards and accessories

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Re: Ideas for daughter cards?

Postby 9600 » Sun May 04, 2014 11:17 am

parapara wrote:I wonder why do you ask only about the PL part.
Is the required modification of the PS side / device tree obvious?


I should think that updating the device tree will be pretty straightforward.

I'm glad you like the idea.
What do you think about providing/shipping the required changes by default?
(OR, if the power consumption impact turns out to be noticeable, prepared and commented out?)


Well, we already have HDMI and headless bitstreams, and then as well as 2nd Ethernet you could also route things such as the 2nd I2C to GPIO. And maintaining bitstreams for every different possible combination of options would be quite time consuming...

I'd definitely like to hear back about the required changes,
but it seems a bit off topic here. Is a good idea to create a separate topic?


I've created a new topic in the FPGA Design forum.

Cheers,

Andrew
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Re: Ideas for daughter cards?

Postby shodruk » Tue May 13, 2014 7:13 am

Is there any microcontroller that can drive eLink without FPGA?
If there is, I think we could make a minimal Parallella that can be embedded anywhere easily with a small battery.
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Re: Ideas for daughter cards?

Postby 9600 » Tue May 13, 2014 8:15 am

shodruk wrote:Is there any microcontroller that can drive eLink without FPGA?
If there is, I think we could make a minimal Parallella that can be embedded anywhere easily with a small battery.


So with a currently available device I assume that would have to be bit-banged GPIO, which immediately made me think of XMOS and an eLink "xSOFTip block". Hrm, I wonder if that could be an interesting combination for deeply embedded uses where you need minimum power consumption and cost... (assuming there is an XMOS device with sufficient I/O pins etc)

Cheers,

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Re: Ideas for daughter cards?

Postby timpart » Tue May 13, 2014 12:14 pm

9600 wrote:So with a currently available device I assume that would have to be bit-banged GPIO, which immediately made me think of XMOS and an eLink "xSOFTip block". Hrm, I wonder if that could be an interesting combination for deeply embedded uses where you need minimum power consumption and cost... (assuming there is an XMOS device with sufficient I/O pins etc)

There are a lot of wires (48 plus ground). You could perhaps halve the number and use buffer chip(s) to do the differential signalling. The protocol looks reasonable (it is documented in the chip data sheet). Not sure if the clock speed might rule out lower end microcontrollers.

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Re: Ideas for daughter cards?

Postby shodruk » Tue May 13, 2014 1:34 pm

Which is cheaper, XMOS or CPLD+small microcontroller?
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Re: Ideas for daughter cards?

Postby stevekez » Tue May 13, 2014 6:08 pm

timpart wrote:
9600 wrote:So with a currently available device I assume that would have to be bit-banged GPIO, which immediately made me think of XMOS and an eLink "xSOFTip block". Hrm, I wonder if that could be an interesting combination for deeply embedded uses where you need minimum power consumption and cost... (assuming there is an XMOS device with sufficient I/O pins etc)

There are a lot of wires (48 plus ground). You could perhaps halve the number and use buffer chip(s) to do the differential signalling. The protocol looks reasonable (it is documented in the chip data sheet). Not sure if the clock speed might rule out lower end microcontrollers.

Tim

Hi,

I'm Steve, and I know a fair amount about XMOS hardware, a fellow researcher pointed me in the direction of this discussion.

As Tim pointed out, an LVDS transceiver would be needed on the external side, bringing the wire count into the microcontroller down to 24. There are several versions of xCORE with enough pins, 128 is probably best to provide any other kind of I/O that might be required, but it'd squeeze onto 64-pin variants too with some room left for a few narrower interfaces.

As for the actual protocol and speed, assuming the divider can be set to 16 for the eLink, then the clock is just about OK for the xCORE to deal with (documentation says 60MHz pin speed, eLink would be 62.5MHz), but I'd think running the Epiphany a little slower would be smart (maybe 800MHz to give 50MHz eLink). This is the bit I'm least sure about as I've never run anything that close to the specs limit on the I/O ports. Another option would be to use an LVDS compatible CPLD in between the two chips and keep speeds native.

As for the CPLD/micro front, I've not got the expertise to pass much comment on that, although I would be interested to see what kind of performance one would anticipate vs an XMOS implementation, which I could probably estimate once I've thought about the instrumentation required to implement the eLink protocol.

I hope this helps, or at least hasn't made things worse.
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Re: Ideas for daughter cards?

Postby FHuettig » Tue May 13, 2014 6:36 pm

A small Spartan-6LX is around $10 in single quantities, it might be enough to translate between eLink and a simple parallel interface, and could be configured from a processor.
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Re: Ideas for daughter cards?

Postby costa » Wed May 14, 2014 7:42 am

FHuettig wrote:A small Spartan-6LX is around $10 in single quantities, it might be enough to translate between eLink and a simple parallel interface, and could be configured from a processor.


Hello! A Lattice MachXO2 CPLD is cheaper and it supports LVDS inputs, the dev board is $20 and the dev IDE is free.

Leo
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Re: Ideas for daughter cards?

Postby Gravis » Wed May 14, 2014 1:56 pm

FHuettig wrote:A small Spartan-6LX is around $10 in single quantities, it might be enough to translate between eLink and a simple parallel interface, and could be configured from a processor.

where did you find the $10 price? the lowest i could find a Spartan-6 LX was ~$16 at digikey. for some reason, FPGA dont go down in cost regardless of quantity (unless they are artificially marked up to start with). however, you only need such a pricey chip if you are trying to max out the IO rate.

If you can settle for 350MHz IO, you can get a ProASIC 3 nano with 49 IOs for $6.16 but if you need more, you can get a ProASIC 3 with 77 IOs for $8.75. Since ProASIC chips are a ASIC/FPGA hybrid, the price scales... a lot.
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Re: Ideas for daughter cards?

Postby stevekez » Wed May 14, 2014 5:05 pm

Gravis wrote:
FHuettig wrote:A small Spartan-6LX is around $10 in single quantities, it might be enough to translate between eLink and a simple parallel interface, and could be configured from a processor.

where did you find the $10 price? the lowest i could find a Spartan-6 LX was ~$16 at digikey. for some reason, FPGA dont go down in cost regardless of quantity (unless they are artificially marked up to start with). however, you only need such a pricey chip if you are trying to max out the IO rate.

If you can settle for 350MHz IO, you can get a ProASIC 3 nano with 49 IOs for $6.16 but if you need more, you can get a ProASIC 3 with 77 IOs for $8.75. Since ProASIC chips are a ASIC/FPGA hybrid, the price scales... a lot.
There's no LVDS capability on the non-L versions of that chip (the L versions seem to be higher performance price by a fair bit), so you'd have to add an LVDS transceiver to the BOM.
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